The MachXO2 family of infinitely reconfigurable Programmable Logic Devices (PLDs) offers designers of low density PLDs an unprecedented mix of low cost, low power and high system integration in a single device. Combining an optimized look-up table (LUT) architecture with 65-nm embedded Flash process technology, the MachXO2 family delivers a 3X increase in logic density, a 10X increase in embedded memory, more than a 100X reduction in static power and up to 30% lower cost compared to the prior generation MachXO PLD family. In addition, the MachXO2 family includes hardened implementations of some of the most popular functions used in system applications (telecom infrastructure, computing, high end industrial, high end medical) and consumer applications (smart phones, GPS devices, mobile computing, digital cameras). These include User Flash Memory (UFM), I2C, SPI and timer/counter. Thus, through the provision of these features and capabilities, the MachXO2 family offers designers a "Do-it-All PLD" for low density applications.